mirror of
https://github.com/KhronosGroup/OpenCL-CTS.git
synced 2026-03-19 06:09:01 +00:00
170 lines
4.1 KiB
C++
170 lines
4.1 KiB
C++
//
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// Copyright (c) 2017 The Khronos Group Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//
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#include "Utility.h"
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#if defined(__PPC__)
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// Global varaiable used to hold the FPU control register state. The FPSCR register can not
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// be used because not all Power implementations retain or observed the NI (non-IEEE
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// mode) bit.
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__thread fpu_control_t fpu_control = 0;
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#endif
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void MulD(double *rhi, double *rlo, double u, double v)
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{
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const double c = 134217729.0; // 1+2^27
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double up, u1, u2, vp, v1, v2;
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up = u*c;
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u1 = (u - up) + up;
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u2 = u - u1;
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vp = v*c;
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v1 = (v - vp) + vp;
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v2 = v - v1;
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double rh = u*v;
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double rl = (((u1*v1 - rh) + (u1*v2)) + (u2*v1)) + (u2*v2);
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*rhi = rh;
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*rlo = rl;
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}
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void AddD(double *rhi, double *rlo, double a, double b)
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{
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double zhi, zlo;
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zhi = a + b;
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if(fabs(a) > fabs(b)) {
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zlo = zhi - a;
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zlo = b - zlo;
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}
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else {
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zlo = zhi - b;
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zlo = a - zlo;
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}
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*rhi = zhi;
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*rlo = zlo;
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}
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void MulDD(double *rhi, double *rlo, double xh, double xl, double yh, double yl)
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{
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double mh, ml;
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double c = 134217729.0;
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double up, u1, u2, vp, v1, v2;
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up = xh*c;
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u1 = (xh - up) + up;
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u2 = xh - u1;
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vp = yh*c;
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v1 = (yh - vp) + vp;
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v2 = yh - v1;
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mh = xh*yh;
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ml = (((u1*v1 - mh) + (u1*v2)) + (u2*v1)) + (u2*v2);
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ml += xh*yl + xl*yh;
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*rhi = mh + ml;
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*rlo = (mh - (*rhi)) + ml;
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}
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void AddDD(double *rhi, double *rlo, double xh, double xl, double yh, double yl)
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{
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double r, s;
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r = xh + yh;
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s = (fabs(xh) > fabs(yh)) ? (xh - r + yh + yl + xl) : (yh - r + xh + xl + yl);
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*rhi = r + s;
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*rlo = (r - (*rhi)) + s;
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}
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void DivideDD(double *chi, double *clo, double a, double b)
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{
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*chi = a / b;
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double rhi, rlo;
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MulD(&rhi, &rlo, *chi, b);
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AddDD(&rhi, &rlo, -rhi, -rlo, a, 0.0);
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*clo = rhi / b;
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}
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// These functions comapre two floats/doubles. Since some platforms may choose to
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// flush denormals to zeros before comparison, comparison like a < b may give wrong
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// result in "certain cases" where we do need correct compasion result when operands
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// are denormals .... these functions comapre floats/doubles using signed integer/long int
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// rep. In other cases, when flushing to zeros is fine, these should not be used.
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// Also these doesn't check for nans and assume nans are handled separately as special edge case
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// by the caller which calls these functions
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// return 0 if both are equal, 1 if x > y and -1 if x < y.
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inline
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int compareFloats(float x, float y)
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{
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int32f_t a, b;
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a.f = x;
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b.f = y;
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if( a.i & 0x80000000 )
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a.i = 0x80000000 - a.i;
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if( b.i & 0x80000000 )
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b.i = 0x80000000 - b.i;
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if( a.i == b.i )
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return 0;
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return a.i < b.i ? -1 : 1;
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}
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inline
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int compareDoubles(double x, double y)
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{
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int64d_t a, b;
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a.d = x;
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b.d = y;
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if( a.l & 0x8000000000000000LL )
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a.l = 0x8000000000000000LL - a.l;
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if( b.l & 0x8000000000000000LL )
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b.l = 0x8000000000000000LL - b.l;
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if( a.l == b.l )
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return 0;
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return a.l < b.l ? -1 : 1;
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}
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void logFunctionInfo(const char *fname, unsigned int float_size, unsigned int isFastRelaxed)
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{
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char const *fpSizeStr = NULL;
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char const *fpFastRelaxedStr = "";
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switch (float_size) {
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case sizeof(cl_double):
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fpSizeStr = "fp64";
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break;
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case sizeof(cl_float):
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fpSizeStr = "fp32";
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break;
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case sizeof(cl_half):
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fpSizeStr = "fp16";
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break;
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}
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if (isFastRelaxed) {
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fpFastRelaxedStr = "rlx";
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}
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vlog("%15s %4s %4s",fname, fpSizeStr, fpFastRelaxedStr);
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}
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