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https://github.com/KhronosGroup/OpenCL-CTS.git
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105 lines
4.1 KiB
C
105 lines
4.1 KiB
C
//
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// Copyright (c) 2017 The Khronos Group Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//
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#ifndef _fpcontrol_h
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#define _fpcontrol_h
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// In order to get tests for correctly rounded operations (e.g. multiply) to work properly we need to be able to set the reference hardware
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// to FTZ mode if the device hardware is running in that mode. We have explored all other options short of writing correctly rounded operations
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// in integer code, and have found this is the only way to correctly verify operation.
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//
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// Non-Apple implementations will need to provide their own implentation for these features. If the reference hardware and device are both
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// running in the same state (either FTZ or IEEE compliant modes) then these functions may be empty. If the device is running in non-default
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// rounding mode (e.g. round toward zero), then these functions should also set the reference device into that rounding mode.
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#if defined( __APPLE__ ) || defined( _MSC_VER ) || defined( __linux__ ) || defined (__MINGW32__)
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typedef int FPU_mode_type;
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#if defined( __i386__ ) || defined( __x86_64__ ) || defined( _MSC_VER ) || defined( __MINGW32__ )
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#include <xmmintrin.h>
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#elif defined( __PPC__ )
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#include <fpu_control.h>
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extern __thread fpu_control_t fpu_control;
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#endif
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// Set the reference hardware floating point unit to FTZ mode
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static inline void ForceFTZ( FPU_mode_type *mode )
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{
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#if defined( __i386__ ) || defined( __x86_64__ ) || defined( _MSC_VER ) || defined (__MINGW32__)
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*mode = _mm_getcsr();
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_mm_setcsr( *mode | 0x8040);
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#elif defined( __PPC__ )
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*mode = fpu_control;
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fpu_control |= _FPU_MASK_NI;
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#elif defined ( __arm__ )
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unsigned fpscr;
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__asm__ volatile ("fmrx %0, fpscr" : "=r"(fpscr));
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*mode = fpscr;
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__asm__ volatile ("fmxr fpscr, %0" :: "r"(fpscr | (1U << 24)));
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// Add 64 bit support
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#elif defined (__aarch64__)
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unsigned fpscr;
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__asm__ volatile ("mrs %0, fpcr" : "=r"(fpscr));
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*mode = fpscr;
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__asm__ volatile ("msr fpcr, %0" :: "r"(fpscr | (1U << 24)));
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#else
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#error ForceFTZ needs an implentation
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#endif
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}
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// Disable the denorm flush to zero
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static inline void DisableFTZ( FPU_mode_type *mode )
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{
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#if defined( __i386__ ) || defined( __x86_64__ ) || defined( _MSC_VER ) || defined (__MINGW32__)
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*mode = _mm_getcsr();
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_mm_setcsr( *mode & ~0x8040);
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#elif defined( __PPC__ )
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*mode = fpu_control;
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fpu_control &= ~_FPU_MASK_NI;
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#elif defined ( __arm__ )
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unsigned fpscr;
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__asm__ volatile ("fmrx %0, fpscr" : "=r"(fpscr));
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*mode = fpscr;
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__asm__ volatile ("fmxr fpscr, %0" :: "r"(fpscr & ~(1U << 24)));
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// Add 64 bit support
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#elif defined (__aarch64__)
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unsigned fpscr;
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__asm__ volatile ("mrs %0, fpcr" : "=r"(fpscr));
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*mode = fpscr;
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__asm__ volatile ("msr fpcr, %0" :: "r"(fpscr & ~(1U << 24)));
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#else
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#error DisableFTZ needs an implentation
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#endif
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}
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// Restore the reference hardware to floating point state indicated by *mode
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static inline void RestoreFPState( FPU_mode_type *mode )
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{
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#if defined( __i386__ ) || defined( __x86_64__ ) || defined( _MSC_VER ) || defined (__MINGW32__)
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_mm_setcsr( *mode );
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#elif defined( __PPC__)
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fpu_control = *mode;
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#elif defined (__arm__)
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__asm__ volatile ("fmxr fpscr, %0" :: "r"(*mode));
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// Add 64 bit support
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#elif defined (__aarch64__)
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__asm__ volatile ("msr fpcr, %0" :: "r"(*mode));
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#else
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#error RestoreFPState needs an implementation
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#endif
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}
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#else
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#error ForceFTZ and RestoreFPState need implentations
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#endif
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#endif
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