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Added cl_khr_fp16 extension support for test_op_negate from spirv_new (#1762)

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* Added cl_khr_fp16 extension support for test_op_negate from spirv_new (issue #142)

* Added clang format fix
This commit is contained in:
Marcin Hajder
2023-06-27 17:43:44 +02:00
committed by GitHub
parent 43c244f01d
commit 73ead9da04
4 changed files with 100 additions and 16 deletions
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35
test_conformance/spirv_new/spirv_asm/op_neg_half.spvasm32 Normal file
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@@ -0,0 +1,35 @@
; SPIR-V
; Version: 1.0
; Generator: Khronos SPIR-V Tools Assembler; 0
; Bound: 17
; Schema: 0
OpCapability Addresses
OpCapability Linkage
OpCapability Kernel
OpCapability Float16
OpMemoryModel Physical32 OpenCL
OpEntryPoint Kernel %1 "op_neg_half" %gl_GlobalInvocationID
OpName %in "in"
OpDecorate %gl_GlobalInvocationID BuiltIn GlobalInvocationId
OpDecorate %gl_GlobalInvocationID Constant
OpDecorate %in FuncParamAttr NoCapture
OpDecorate %gl_GlobalInvocationID LinkageAttributes "__spirv_GlobalInvocationId" Import
%uint = OpTypeInt 32 0
%v3uint = OpTypeVector %uint 3
%_ptr_Input_v3uint = OpTypePointer Input %v3uint
%void = OpTypeVoid
%half = OpTypeFloat 16
%_ptr_CrossWorkgroup_half = OpTypePointer CrossWorkgroup %half
%10 = OpTypeFunction %void %_ptr_CrossWorkgroup_half
%gl_GlobalInvocationID = OpVariable %_ptr_Input_v3uint Input
%1 = OpFunction %void None %10
%in = OpFunctionParameter %_ptr_CrossWorkgroup_half
%11 = OpLabel
%12 = OpLoad %v3uint %gl_GlobalInvocationID Aligned 0
%13 = OpCompositeExtract %uint %12 0
%14 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_half %in %13
%15 = OpLoad %half %14
%16 = OpFNegate %half %15
OpStore %14 %16
OpReturn
OpFunctionEnd

39
test_conformance/spirv_new/spirv_asm/op_neg_half.spvasm64 Normal file
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@@ -0,0 +1,39 @@
; SPIR-V
; Version: 1.0
; Generator: Khronos SPIR-V Tools Assembler; 0
; Bound: 20
; Schema: 0
OpCapability Addresses
OpCapability Linkage
OpCapability Kernel
OpCapability Int64
OpCapability Float16
OpMemoryModel Physical64 OpenCL
OpEntryPoint Kernel %1 "op_neg_half" %gl_GlobalInvocationID
OpName %in "in"
OpDecorate %gl_GlobalInvocationID BuiltIn GlobalInvocationId
OpDecorate %gl_GlobalInvocationID Constant
OpDecorate %in FuncParamAttr NoCapture
OpDecorate %gl_GlobalInvocationID LinkageAttributes "__spirv_GlobalInvocationId" Import
%ulong = OpTypeInt 64 0
%v3ulong = OpTypeVector %ulong 3
%_ptr_Input_v3ulong = OpTypePointer Input %v3ulong
%void = OpTypeVoid
%half = OpTypeFloat 16
%_ptr_CrossWorkgroup_half = OpTypePointer CrossWorkgroup %half
%10 = OpTypeFunction %void %_ptr_CrossWorkgroup_half
%ulong_32 = OpConstant %ulong 32
%gl_GlobalInvocationID = OpVariable %_ptr_Input_v3ulong Input
%1 = OpFunction %void None %10
%in = OpFunctionParameter %_ptr_CrossWorkgroup_half
%12 = OpLabel
%13 = OpLoad %v3ulong %gl_GlobalInvocationID Aligned 0
%14 = OpCompositeExtract %ulong %13 0
%15 = OpShiftLeftLogical %ulong %14 %ulong_32
%16 = OpShiftRightArithmetic %ulong %15 %ulong_32
%17 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_half %in %16
%18 = OpLoad %half %17
%19 = OpFNegate %half %18
OpStore %17 %19
OpReturn
OpFunctionEnd

40
test_conformance/spirv_new/test_op_negate.cpp
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@@ -32,6 +32,15 @@ int test_negation(cl_device_id deviceID,
return 0; return 0;
} }
} }
if (std::string(Tname).find("half") != std::string::npos)
{
if (!is_extension_available(deviceID, "cl_khr_fp16"))
{
log_info(
"Extension cl_khr_fp16 not supported; skipping half tests.\n");
return 0;
}
}
cl_int err = CL_SUCCESS; cl_int err = CL_SUCCESS;
int num = (int)h_in.size(); int num = (int)h_in.size();
@@ -73,29 +82,28 @@ int test_negation(cl_device_id deviceID,
return 0; return 0;
} }
#define TEST_NEGATION(TYPE, Tv, OP, FUNC) \ #define TEST_NEGATION(TYPE, Tv, OP, FUNC) \
TEST_SPIRV_FUNC(OP##_##TYPE) \ TEST_SPIRV_FUNC(OP##_##TYPE) \
{ \ { \
int num = 1 << 20; \ int num = 1 << 20; \
std::vector<Tv> in(num); \ std::vector<Tv> in(num); \
RandomSeed seed(gRandomSeed); \ RandomSeed seed(gRandomSeed); \
for (int i = 0; i < num; i++) { \ for (int i = 0; i < num; i++) \
in[i] = genrand<Tv>(seed); \ { \
} \ in[i] = genrand<Tv>(seed); \
return test_negation<Tv>(deviceID, \ } \
context, \ return test_negation<Tv>(deviceID, context, queue, #TYPE, #OP, in, \
queue, \ FUNC); \
#TYPE, \ }
#OP, \
in, FUNC); \
} \
#define TEST_NEG_HALF TEST_NEGATION(half, cl_half, op_neg, negOpHalf)
#define TEST_NEG(TYPE) TEST_NEGATION(TYPE, cl_##TYPE, op_neg, negOp<cl_##TYPE>) #define TEST_NEG(TYPE) TEST_NEGATION(TYPE, cl_##TYPE, op_neg, negOp<cl_##TYPE>)
#define TEST_NOT(TYPE) TEST_NEGATION(TYPE, cl_##TYPE, op_not, notOp<cl_##TYPE>) #define TEST_NOT(TYPE) TEST_NEGATION(TYPE, cl_##TYPE, op_not, notOp<cl_##TYPE>)
#define TEST_NEG_VEC(TYPE, N) TEST_NEGATION(TYPE##N, cl_##TYPE##N, op_neg, (negOpVec<cl_##TYPE##N, N>)) #define TEST_NEG_VEC(TYPE, N) TEST_NEGATION(TYPE##N, cl_##TYPE##N, op_neg, (negOpVec<cl_##TYPE##N, N>))
#define TEST_NOT_VEC(TYPE, N) TEST_NEGATION(TYPE##N, cl_##TYPE##N, op_not, (notOpVec<cl_##TYPE##N, N>)) #define TEST_NOT_VEC(TYPE, N) TEST_NEGATION(TYPE##N, cl_##TYPE##N, op_not, (notOpVec<cl_##TYPE##N, N>))
TEST_NEG_HALF
TEST_NEG(float) TEST_NEG(float)
TEST_NEG(double) TEST_NEG(double)
TEST_NEG(int) TEST_NEG(int)

2
test_conformance/spirv_new/types.hpp
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@@ -161,6 +161,8 @@ Tv negOp(Tv in)
return -in; return -in;
} }
inline cl_half negOpHalf(cl_half v) { return v ^ 0x8000; }
template<typename Tv> template<typename Tv>
Tv notOp(Tv in) Tv notOp(Tv in)
{ {